Postavke

Simulacija

Dnevnik događaja t = korakEvent log t = step

Vremenska crta svaki stupac je jedan korak putaTimeline each column is one step of the path

Gotovi scenariji

Teorija

Slojevi U/I

Stallings (sl. 11.4(c)) prikazuje put zahtjeva za datotekom kroz slojeve: korisnički procesi, directory management (upravljanje direktorijima), file system (datotečni sustav), physical organization (fizička organizacija), device I/O (U/I uređaja), scheduling and control (raspoređivanje i upravljanje) i hardver. Poziv read(3, buf, 64) na ovoj stranici prolazi upravo tim redom. System call (sistemski poziv) ulazi u jezgru, datotečni sustav preko inode-a datoteke /home/ana/biljeske.txt nalazi da je njezin logički blok 0 fizički blok 24, device driver (upravljački program) stvara zahtjev R1 „čitaj blok 24”, a disk scheduling (raspoređivanje diska) određuje kad će ga disk poslužiti. Svaki od tih slojeva ima svoju stranicu: Datotečni sustav, Upravljački programi i Raspoređivanje diska.

I/O layers

Stallings (Fig. 11.4(c)) shows the path of a file request through the layers: user processes, directory management, file system, physical organization, device I/O, scheduling and control, and hardware. The call read(3, buf, 64) on this page passes through them in exactly this order. The system call enters the kernel, the file system uses the inode of the file /home/ana/biljeske.txt to find that its logical block 0 is physical block 24, the device driver creates request R1 “read block 24”, and disk scheduling decides when the disk will serve it. Each of these layers has its own page: File system, Device drivers and Disk scheduling.

Blokirajući U/I i preklapanje s DMA

Uz blocking I/O (blokirajući U/I) proces koji je zatražio podatke ne može nastaviti dok ih nema, pa ga jezgra prebacuje u stanje Blocked (blokiran). Procesor zato ne čeka disk: scheduler (raspoređivač) pokreće drugi spremni proces, ovdje P2. Za to vrijeme direct memory access (DMA, izravan pristup memoriji) prenosi blok u memoriju bez procesora, kao 4 riječi uz cycle stealing (krađa ciklusa), i javlja se samo jednim prekidom na kraju. Prekid budi P1: iz Blocked prelazi u Ready (spreman), a procesor dobiva tek kad ga raspoređivač izabere. U scenariju „read() s promašajem” P1 je blokiran 8 od 21 koraka, a procesor nijednom ne stoji. Vidi Procese i Tehnike U/I.

Blocking I/O and overlap with DMA

With blocking I/O, the process that requested the data cannot continue until the data are there, so the kernel moves it to the Blocked state. The processor therefore does not wait for the disk: the scheduler runs another ready process, here P2. Meanwhile direct memory access (DMA) transfers the block into memory without the processor, as 4 words with cycle stealing, and reports back with a single interrupt at the end. The interrupt wakes P1: it moves from Blocked to Ready, and gets the processor only when the scheduler picks it. In the scenario “read() with a disk cache miss” P1 is blocked for 8 of 21 steps, and the processor is never idle. See Processes and I/O techniques.

Prekidi, iznimke, promjena načina rada i konteksta

Interrupt (prekid) je asinkron: šalje ga uređaj kad završi posao (IRQ2 diska, vektor 0x22) ili timer kad istekne kvant. Exception (iznimka) je sinkrona: izaziva je sama instrukcija, npr. page fault (promašaj stranice, vektor 0x0E). Oboje prebacuje procesor u jezgreni način. Mode switch (promjena načina rada) je prijelaz U ↔ K bez promjene procesa i jeftin je, dok process switch (promjena konteksta) sprema stanje jednog procesa u njegov PCB i vraća stanje drugoga. Zato statistika broji oboje: read() s promašajem ima 6 promjena načina rada, ali samo 2 promjene konteksta. Uz preempciju pri buđenju ostaju 4 i 2, kao na stranici Sistemski pozivi. Vidi i Prekide te Raspoređivanje.

Interrupts, exceptions, mode switches and process switches

An interrupt is asynchronous: a device sends it when it finishes its work (IRQ2 of the disk, vector 0x22), or the timer when a quantum expires. An exception is synchronous: the instruction itself causes it, e.g. a page fault (vector 0x0E). Both switch the processor to kernel mode. A mode switch is the transition U ↔ K without changing the process, and it is cheap, while a process switch saves the state of one process in its PCB and restores the state of another. That is why the statistics count both: read() with a miss has 6 mode switches but only 2 process switches. With preemption on wake-up there are 4 and 2, as on the System calls page. See also Interrupts and Scheduling.

Promašaj stranice i ponavljanje instrukcije

Proces čita logičku adresu 2526: uz stranice od 1 KB to je stranica 2, pomak 478. Memory management unit (MMU, jedinica za upravljanje memorijom) ne nalazi stranicu u translation lookaside buffer (TLB, mala memorija nedavnih prijevoda u MMU-u), a u tablici stranica present bit (bit prisutnosti) je 0, pa nastaje iznimka. Jezgra provjeri da je adresa valjana, izabere victim page (stranica-žrtva), ovdje stranicu 0 u okviru 5 pod FIFO, LRU, OPT i Clock jednako, i poništi njezin unos. Ako je žrtva izmijenjena (modify bit, bit izmjene), prvo slijedi write-back (pisanje natrag), a tek onda čitanje stranice 2. Dok se stranica 2 čita s diska, proces čeka u stanju Blocked, kao kod blokirajućeg U/I. Nakon prekida jezgra upisuje novi unos u page table (tablica stranica), a instruction restart (ponovno pokretanje instrukcije) izvodi istu instrukciju ispočetka: fizička adresa je 5 · 1024 + 478 = 5598. Vidi Prevođenje adresa i Zamjenu stranica.

Page fault and instruction restart

The process reads logical address 2526: with 1 KB pages this is page 2, offset 478. The memory management unit (MMU) does not find the page in the translation lookaside buffer (TLB, a small memory of recent translations in the MMU), and in the page table the present bit is 0, so an exception occurs. The kernel checks that the address is valid, chooses a victim page, here page 0 in frame 5, the same under FIFO, LRU, OPT and Clock, and invalidates its entry. If the victim is modified (modify bit), a write-back comes first, and only then is page 2 read. While page 2 is being read from disk, the process waits in the Blocked state, as with blocking I/O. After the interrupt the kernel writes the new entry into the page table, and instruction restart executes the same instruction again from the start: the physical address is 5 · 1024 + 478 = 5598. See Address translation and Page replacement.

Priručne memorije skraćuju put

Disk cache (priručna memorija diska), u UNIX-u buffer cache (međuspremnička priručna memorija), drži nedavno korištene blokove u glavnoj memoriji. Kad je blok 24 već ondje, hit (pogodak) preskače cijeli put do diska: read() ima 8 koraka umjesto 21, bez blokiranja, bez promjene konteksta i bez prekida. TLB na isti način čuva nedavna prevođenja stranica, pa pogodak u TLB-u preskače čitanje tablice stranica. Vidi RAID i priručnu memoriju diska.

Caches shorten the path

The disk cache, in UNIX the buffer cache, keeps recently used blocks in main memory. When block 24 is already there, a hit skips the whole path to the disk: read() takes 8 steps instead of 21, with no blocking, no process switch and no interrupt. The TLB likewise keeps recent page translations, so a TLB hit skips reading the page table. See RAID and disk cache.

Literatura: Stallings, Operating Systems: Internals and Design Principles, 9. izd., pogl. 11 i 8 (§11.2, §11.3, §11.5, §11.7, §11.8), §1.4 Interrupts, §1.7 Direct Memory Access, §3.2 Process States, §3.4 Process Control, §8.1; alternativno Tanenbaum & Bos, Modern Operating Systems, pogl. 1, 3 i 5 (§1.6 sistemski pozivi, obrada promašaja stranice u pogl. 3 i slojevi U/I softvera u §5.3).Reading: Stallings, Operating Systems: Internals and Design Principles, 9th ed., ch. 11 and 8 (sec. 11.2, 11.3, 11.5, 11.7 and 11.8), sec. 1.4 Interrupts, sec. 1.7 Direct Memory Access, sec. 3.2 Process States, sec. 3.4 Process Control, sec. 8.1; alternatively Tanenbaum & Bos, Modern Operating Systems, ch. 1, 3 and 5 (sec. 1.6 system calls, page fault handling in ch. 3 and the layers of I/O software in sec. 5.3).